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Computer Organization and Design, Revised Printing
The Hardware/Software Interface
3rd Edition - June 6, 2007
Authors: David A. Patterson, John L. Hennessy
9 7 8 - 0 - 0 8 - 0 5 5 0 3 3 - 6
What’s New in the Third Edition, Revised Printing The same great book gets better! This revised printing features all of the original content along with these additional… Read more
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What’s New in the Third Edition, Revised Printing The same great book gets better! This revised printing features all of the original content along with these additional features:• Appendix A (Assemblers, Linkers, and the SPIM Simulator) has been moved from the CD-ROM into the printed book• Corrections and bug fixesThird Edition featuresNew pedagogical features• Understanding Program Performance - Analyzes key performance issues from the programmer’s perspective • Check Yourself Questions - Helps students assess their understanding of key points of a section • Computers In the Real World - Illustrates the diversity of applications of computing technology beyond traditional desktop and servers • For More Practice - Provides students with additional problems they can tackle • In More Depth - Presents new information and challenging exercises for the advanced student New reference features • Highlighted glossary terms and definitions appear on the book page, as bold-faced entries in the index, and as a separate and searchable reference on the CD. • A complete index of the material in the book and on the CD appears in the printed index and the CD includes a fully searchable version of the same index. • Historical Perspectives and Further Readings have been updated and expanded to include the history of software R&D. • CD-Library provides materials collected from the web which directly support the text. In addition to thoroughly updating every aspect of the text to reflect the most current computing technology, the third edition • Uses standard 32-bit MIPS 32 as the primary teaching ISA. • Presents the assembler-to-HLL translations in both C and Java. • Highlights the latest developments in architecture in Real Stuff sections: - Intel IA-32 - Power PC 604 - Google’s PC cluster - Pentium P4 - SPEC CPU2000 benchmark suite for processors - SPEC Web99 benchmark for web servers - EEMBC benchmark for embedded systems - AMD Opteron memory hierarchy - AMD vs. 1A-64 New support for distinct course goals Many of the adopters who have used our book throughout its two editions are refining their courses with a greater hardware or software focus. We have provided new material to support these course goals: New material to support a Hardware Focus • Using logic design conventions • Designing with hardware description languages • Advanced pipelining • Designing with FPGAs • HDL simulators and tutorials • Xilinx CAD tools New material to support a Software Focus • How compilers work • How to optimize compilers • How to implement object oriented languages • MIPS simulator and tutorial • History sections on programming languages, compilers, operating systems and databases On the CD• NEW: Search function to search for content on both the CD-ROM and the printed text• CD-Bars: Full length sections that are introduced in the book and presented on the CD • CD-Appendixes: Appendices B-D • CD-Library: Materials collected from the web which directly support the text • CD-Exercises: For More Practice provides exercises and solutions for self-study• In More Depth presents new information and challenging exercises for the advanced or curious student • Glossary: Terms that are defined in the text are collected in this searchable reference • Further Reading: References are organized by the chapter they support • Software: HDL simulators, MIPS simulators, and FPGA design tools • Tutorials: SPIM, Verilog, and VHDL • Additional Support: Processor Models, Labs, Homeworks, Index covering the book and CD contents Instructor Support Instructor support provided on textbooks.elsevier.com:• Solutions to all the exercises • Figures from the book in a number of formats • Lecture slides prepared by the authors and other instructors • Lecture notes
*For the Revised Printing, Appendix A appears in the printed book rather than on the CD. This is the only change.*Explains the latest benchmarking software including SPEC CPU2000 suite for processors, SPEC Web99 for web servers, and EEMBC for embedded systems*Features the latest developments of the Intel IA-32 architecture as well as the Power PC 604, the AMD Opteron Memory, and the Intrinsity FastMATH processor.*Compares MIPs assembler code to both C and Java
Professional digital system designers, programmers, application developers, and system software developers.Undergraduate students in Computer Science, Computer Engineering and Electrical Engineering courses in Computer Organization, Computer Design, ranging from Sophomore required courses to Senior Electives
Chapter sections in bold type are new to this edition Chapters and sections in italics are located on the CD Chapter One: Computer Abstractions and Technology1.1 Introduction 1.2 Below Your Program 1.3 Under the Covers 1.4 Real Stuff: Manufacturing Pentium 4 Chips 1.5 Fallacies and Pitfalls 1.6 Concluding Remarks 1.7 Historical Perspective and Further Reading1.8 ExercisesComputers in the Real World: Information Technology for the 4 Billion without IT Chapter Two: Instructions: Language of the Computer2.1 Introduction 2.2 Operations of the Computer Hardware 2.3 Operands of the Computer Hardware 2.4 Representing Instructions in the Computer 2.5 Logical Operations 2.6 Instructions for Making Decisions 2.7 Supporting Procedures in Computer Hardware 2.8 Communicating with People 2.9 MIPS Addressing for 32-bit Immediates and Addresses2.10 Starting a Program2.11 How Compilers Optimize2.12 How Compilers Work: An Introduction 2.13 A C Sort Example to Put It All Together 2.14 Implementing an Object Oriented Language 2.15 Arrays versus Pointers 2.16 Real Stuff: IA-32 Instructions 2.17 Fallacies and Pitfalls 2.18 Concluding Remarks 2.19 Historical Perspective and Further Reading2.20 ExercisesComputers in the Real World: Saving our Environment with DataChapter Three: Arithmetic for Computers3.1 Introduction 3.2 Signed and Unsigned Numbers 3.3 Addition and Subtraction 3.4 Multiplication 3.5 Division 3.6 Floating Point 3.7 Real Stuff: Floating Point in the IA-32 3.8 Fallacies and Pitfalls 3.9 Concluding Remarks 3.10 Historical Perspective and Further Reading3.11 ExercisesComputers in the Real World: Reconstructing the Ancient WorldChapter Four: Assessing and Understanding Performance4.1 Introduction 4.2 CPU Performance and Its Factors 4.3 Evaluating Performance 4.4 Real Stuff: Two SPEC Benchmarks and the Performance of Recent Intel Processors 4.5 Fallacies and Pitfalls 4.6 Concluding Remarks 4.7 Historical Perspective and Further Reading4.8 Exercises Computers in the Real World: Moving People Faster and More SafelyChapter Five: The Processor: Datapath and Control5.1 Introduction 5.2 Logic Design Conventions 5.3 Building a Datapath 5.4 A Simple Implementation Scheme 5.5 A Multicycle Implementation 5.7 Exceptions 5.8 Microprogramming: Simplifying Control Design 5.9 An Introduction to Digital Design Using a Hardware Design Language5.10 Real Stuff: The Organization of Recent Pentium Implementations 5.11 Fallacies and Pitfalls 5.12 Concluding Remarks 5.13 Historical Perspective and Further Reading5.14 ExercisesComputers in the Real World: Empowering the Disabled Chapter Six: Enhancing Performance with Pipelining6.1 An Overview of Pipelining 6.2 A Pipelined Datapath 6.3 Pipelined Control 6.4 Data Hazards and Forwarding 6.5 Data Hazards and Stalls 6.6 Branch Hazards 6.7 Using a Hardware Description Language to Describe and Model a Pipeline 6.8 Exceptions 6.9 Advanced Pipelining: Extracting More Performance 6.10 Real Stuff: The Pentium 4 Pipeline 6.11 Fallacies and Pitfalls 6.12 Concluding Remarks 6.13 Historical Perspective and Further Reading6.14 ExercisesComputers in the Real World: Mass Communications without Gatekeepers Chapter Seven: Large and Fast: Exploiting Memory Hierarchy7.1 Introduction 7.2 The Basics of Caches 7.3 Measuring and Improving Cache Performance 7.4 Virtual Memory 7.5 A Common Framework for Memory Hierarchies 7.6 Real Stuff: A Pentium P4 and the AMD Opteron Memory Hierarchies 7.7 Fallacies and Pitfalls 7.8 Concluding Remarks 7.9 Historical Perspective and Further Reading7.10 ExercisesComputers in the Real World: Saving the World’s Art Treasures Chapter Eight: Storage, Networks, and Other Peripherals8.1 Introduction 8.2 Disk Storage and Dependability8.3 Networks 8.4 Buses: Connecting I/O Devices to Processor and Memory 8.5 Interfacing I/O Devices to the Memory, Processor, and Operating System 8.6 I/O Performance Measures: Examples from Disk and File Systems 8.7 Designing an I/O System 8.8 Real Stuff: A Typical Desktop I/O System 8.9 Fallacies and Pitfalls 8.10 Concluding Remarks 8.11 Historical Perspective and Further Reading8.12 ExercisesComputers in the Real World: Saving Lives Through Better DiagnosisAppendix A: Assemblers, Linkers, and the SPIM SimulatorA.1 Introduction A.2 Assemblers A.3 Linkers A.4 Loading A.5 Memory Usage A.6 Procedure Call Convention A.7 Exceptions and Interrupts A.8 Input and Output A.9 SPIM A.10 MIPS R2000 Assembly Language A.11 Concluding Remarks A.12 Exercises All of the folling material appears on the CDChapter Nine: Multiprocessors9.1 Introduction 9.2 Programming Multiprocessors 9.3 Multiprocessors Connected by a Single Bus 9.4 Multiprocessors Connected by a Network 9.5 Clusters 9.6 Network Topologies 9.7 Multiprocessors Inside a Chip and Multithreading 9.8 Real Stuff: The Google Cluster of PCs 9.9 Fallacies and Pitfalls 9.10 Concluding Remarks 9.11 Historical Perspective and Further Reading 9.12 Exercises Appendix B: The Basics of Logic DesignB.1 Introduction B.2 Gates, Truth Tables, and Logic Equations B.3 Combinational Logic B.4 Clocks B.5 Memory Elements B.6 Finite State Machines B.7 Timing Methodologies B.8 Field Programmable DevicesB.9 Concluding Remarks B.10 Exercises Appendix C: Mapping Control to HardwareC.1 Introduction C.2 Implementing Combinational Control Units C.3 Implementing Finite State Machine Control C.4 Implementing the Next-State Function with a Sequencer C.5 Translating a Microprogram to Hardware C.6 Concluding Remarks C.7 Exercises Appendix D: A Survey of RISC Architectures for Desktop, Server, and Embedded ComputersD.1 Introduction D.2 Addressing Modes and Instruction Formats D.3 Instructions: The MIPS Core Subset D.4 Instructions: Multimedia Extensions of the Desktop/Server RISCs D.5 Instructions: Digital Signal-Processing Extensions of the Embedded RISCs D.6 Instructions: Common Extensions to MIPS Core D.7 Instructions Unique to MIPS64 D.8 Instructions Unique to Alpha D.9 Instructions Unique to SPARC v.9 D.10 Instructions Unique to PowerPC D.11 Instructions Unique to PA-RISC 2.0 D.12 Instructions Unique to ARM D.13 Instructions Unique to ThumbD.14 Instructions Unique to SuperH D.15 Instructions Unique to M32R D.16 Instructions Unique to MIPS16 D.17 Concluding Remarks D.18 Acknowledgements D.19 References
No. of pages: 741
Published: June 6, 2007
Imprint: Morgan Kaufmann
eBook ISBN: 9780080550336
David A. Patterson
ACM named David A. Patterson a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. David A. Patterson is the Pardee Chair of Computer Science, Emeritus at the University of California Berkeley. His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Patterson received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions to RISC, and he shared the IEEE Johnson Information Storage Award for contributions to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize with John Hennessy. Like his co-author, Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the CS division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM. This record led to Distinguished Service Awards from ACM, CRA, and SIGARCH.
Affiliations and expertise
Pardee Professor of Computer Science, Emeritus, University of California, Berkeley, USA
John L. Hennessy
ACM named John L. Hennessy a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. John L. Hennessy is a Professor of Electrical Engineering and Computer Science at Stanford University, where he has been a member of the faculty since 1977 and was, from 2000 to 2016, its tenth President. Prof. Hennessy is a Fellow of the IEEE and ACM; a member of the National Academy of Engineering, the National Academy of Science, and the American Philosophical Society; and a Fellow of the American Academy of Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and the 2000 John von Neumann Award, which he shared with David Patterson. He has also received seven honorary doctorates.
Affiliations and expertise
Departments of Electrical Engineering and Computer Science, Stanford University, USA