Nanomaterials-Based Charge Trapping Memory Devices

Rising consumer demand for low power consumption electronics has generated a need for scalable and reliable memory devices with low power consumption. At present, scaling memory devices and lowering their power consumption is becoming more difficult due to unresolved challenges, such as short channel effect, Drain Induced Barrier Lowering (DIBL), and sub-surface punch-through effect, all of which cause high leakage currents. As a result, the introduction of different memory architectures or materials is crucial.

Nanomaterials-based Charge Trapping Memory Devices

This book is an important reference for materials scientists and engineers, who are looking to develop low-powered solutions to meet the growing demand for consumer electronic products and devices.

• Explores in depth memory device operation, requirements and challenges
• Presents fabrication methods and characterization results of new nanomaterials using techniques, including laser ablation of nanoparticles, ALD growth of nano-islands, and agglomeration-based technique of nanoparticles
• Demonstrates how nanomaterials affect the performance of memory devices

Materials scientists, energy engineers