
Deep Learning on Edge Computing Devices
Design Challenges of Algorithm and Architecture
- 1st Edition - February 2, 2022
- Imprint: Elsevier
- Authors: Xichuan Zhou, Haijun Liu, Cong Shi, Ji Liu
- Language: English
- Paperback ISBN:9 7 8 - 0 - 3 2 3 - 8 5 7 8 3 - 3
- eBook ISBN:9 7 8 - 0 - 3 2 3 - 9 0 9 2 7 - 3
Deep Learning on Edge Computing Devices: Design Challenges of Algorithm and Architecture focuses on hardware architecture and embedded deep learning, including neural networ… Read more
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This book provides a solution for researchers looking to maximize the performance of deep learning models on Edge-computing devices through algorithm-hardware co-design.
- Focuses on hardware architecture and embedded deep learning, including neural networks
- Brings together neural network algorithm and hardware design optimization approaches to deep learning, alongside real-world applications
- Considers how Edge computing solves privacy, latency and power consumption concerns related to the use of the Cloud
- Describes how to maximize the performance of deep learning on Edge-computing devices
- Presents the latest research on neural network compression coding, deep learning algorithms, chip co-design and intelligent monitoring
PART 1. INTRODUCTION
1. Introduction
1.1 Background
1.1.1 Deep Learning Background
1.1.2 Applications of Deep Learning on Edge Device
1.2 Architecture and Taxonomy
1.3 Measurements of Performance
1.4 Objectives and Contribution
1.5 Outline of the Book
PART 2. THEORY AND ALGORITHM
2. Model Inference on Edge Device
2.1 Background and Challenges
2.2 Agile Network Architectures
2.3 Model Distillation
2.4 Pruning and Quantization
- Automatic Neural Network Compression by Sparsity-Quantization Joint Learning: A Constrained Optimization-based Approach, CVPR 2020
- Model Compression with Adversarial Robustness: A Unified Optimization Framework, NIPS 2019
- ECC: Energy Constrained Deep Neural Network Compression via a Bilinear Regression Model, CVPR 2019
- Energy-Constrained Compression for Deep Neural Networks via Weighted Sparse Projection and Layer Input Masking, ICLR 2019
2.5 Applications
3. Model Training on Edge Device
3.1 Privacy Preserving Challenges
3.2 Distributed Learning / Federated Learning Approach: Asynchronization, Centralization and Decentralization
- Asynchronous Parallel Stochastic Gradient for Nonconvex Optimizations, NIPS 2015
- Xiangru Lian, Huan Zhang, Cho-Jui Hsieh, Yijun Huang, and Ji Liu, NIPS 2016
- Can Decentralized Algorithms Outperform Centralized Algorithms? A Case Study for Decentralized Parallel Stochastic Gradient Descent, NIPS 2017
3.4 Communication efficient algorithms
- DoubleSqueeze: Parallel Stochastic Gradient Descent with Double-Pass Error-Compensated Compression, ICML 2019
- Gradient sparsification for communication-efficient distributed optimization, NIPS 2018
- Central server free federated learning over single-sided trust social networks, 2019
3.5 Applications for Mobile Neural Computing
4. Network Encoding and Quantization
4.1 Background and Challenges
4.2 Rate Distortion Theory and Sparse Encoding
4.3 Bit Bottleneck Quantization Methods
4.4 Application for Efficient Image Classification
PART 3. ARCHITECTURE OPTIMIZATION
5. DANoC: An Algorithm and Hardware Codesign Prototype
5.1 Background and Challenges
5.2 Algorithm Design and Optimization
5.3 Near-Memory Computing Architecture
5.4 Applications of Deep Adaptive Network on Chip
6. Ensemble Spiking Networks on Edge Device
6.1 Background and Challenges
6.2 Ensemble Spiking Neural Computing Model
6.3 Architecture Design and Optimization
6.4 Performance
7. SenseCamera: A Learning Based Multifunctional Smart Camera Prototype
7.1 Challenges beyond Pattern Recognition
7.2 Compressive Convolutional Network Model
7.3 Hardware Implementation and Optimization
- Edition: 1
- Published: February 2, 2022
- Imprint: Elsevier
- Language: English
XZ
Xichuan Zhou
HL
Haijun Liu
CS
Cong Shi
JL