Deep Learning on Edge Computing Devices
Design Challenges of Algorithm and Architecture
- 1st Edition - February 2, 2022
- Imprint: Elsevier
- Authors: Xichuan Zhou, Haijun Liu, Cong Shi, Ji Liu
- Language: English
- Paperback ISBN:9 7 8 - 0 - 3 2 3 - 8 5 7 8 3 - 3
- eBook ISBN:9 7 8 - 0 - 3 2 3 - 9 0 9 2 7 - 3
Deep Learning on Edge Computing Devices: Design Challenges of Algorithm and Architecture focuses on hardware architecture and embedded deep learning, including neural networ… Read more
Purchase options
Institutional subscription on ScienceDirect
Request a sales quoteDeep Learning on Edge Computing Devices: Design Challenges of Algorithm and Architecture focuses on hardware architecture and embedded deep learning, including neural networks. The title helps researchers maximize the performance of Edge-deep learning models for mobile computing and other applications by presenting neural network algorithms and hardware design optimization approaches for Edge-deep learning. Applications are introduced in each section, and a comprehensive example, smart surveillance cameras, is presented at the end of the book, integrating innovation in both algorithm and hardware architecture. Structured into three parts, the book covers core concepts, theories and algorithms and architecture optimization.
This book provides a solution for researchers looking to maximize the performance of deep learning models on Edge-computing devices through algorithm-hardware co-design.
This book provides a solution for researchers looking to maximize the performance of deep learning models on Edge-computing devices through algorithm-hardware co-design.
- Focuses on hardware architecture and embedded deep learning, including neural networks
- Brings together neural network algorithm and hardware design optimization approaches to deep learning, alongside real-world applications
- Considers how Edge computing solves privacy, latency and power consumption concerns related to the use of the Cloud
- Describes how to maximize the performance of deep learning on Edge-computing devices
- Presents the latest research on neural network compression coding, deep learning algorithms, chip co-design and intelligent monitoring
Computer scientists and researchers in applied informatics, Artificial Intelligence, data science, Cloud computing, networking, and information technology; Researchers in hardware design, deep learning, and optimization; Engineers working on Edge or embedded AI or deep learning applications
- Cover image
- Title page
- Table of Contents
- Copyright
- Preface
- Acknowledgements
- Part 1: Introduction
- Chapter 1: Introduction
- Abstract
- 1.1. Background
- 1.2. Applications and trends
- 1.3. Concepts and taxonomy
- 1.4. Challenges and objectives
- 1.5. Outline of the book
- References
- Chapter 2: The basics of deep learning
- Abstract
- 2.1. Feedforward neural networks
- 2.2. Deep neural networks
- 2.3. Learning objectives and training process
- 2.4. Computational complexity
- References
- Part 2: Model and algorithm
- Chapter 3: Model design and compression
- Abstract
- 3.1. Background and challenges
- 3.2. Design of lightweight neural networks
- 3.3. Model compression
- References
- Chapter 4: Mix-precision model encoding and quantization
- Abstract
- 4.1. Background and challenges
- 4.2. Rate-distortion theory and sparse encoding
- 4.3. Bitwise bottleneck quantization methods
- 4.4. Application to efficient image classification
- References
- Chapter 5: Model encoding of binary neural networks
- Abstract
- 5.1. Background and challenges
- 5.2. The basic of binary neural network
- 5.3. The cellular binary neural network with lateral connections
- 5.4. Application to efficient image classification
- References
- Part 3: Architecture optimization
- Chapter 6: Binary neural network computing architecture
- Abstract
- 6.1. Background and challenges
- 6.2. Ensemble binary neural computing model
- 6.3. Architecture design and optimization
- 6.4. Application of binary computing architecture
- References
- Chapter 7: Algorithm and hardware codesign of sparse binary network on-chip
- Abstract
- 7.1. Background and challenges
- 7.2. Algorithm design and optimization
- 7.3. Near-memory computing architecture
- 7.4. Applications of deep adaptive network on chip
- References
- Chapter 8: Hardware architecture optimization for object tracking
- Abstract
- 8.1. Background and challenges
- 8.2. Algorithm
- 8.3. Hardware implementation and optimization
- 8.4. Application experiments
- References
- Chapter 9: SensCamera: A learning-based smart camera prototype
- Abstract
- 9.1. Challenges beyond pattern recognition
- 9.2. Compressive convolutional network model
- 9.3. Hardware implementation and optimization
- 9.4. Applications of SensCamera
- References
- Index
- Edition: 1
- Published: February 2, 2022
- No. of pages (Paperback): 198
- No. of pages (eBook): 198
- Imprint: Elsevier
- Language: English
- Paperback ISBN: 9780323857833
- eBook ISBN: 9780323909273
XZ
Xichuan Zhou
Xichuan Zhou is Professor and Vice Dean in the School of Microelectronics and Communication Engineering, at Chongqing University, China. He received his PhD from Zhejiang University. His research focuses on embedded neural computing, brain-like sensing, and pervasive computing. He has won professional awards for his work, and has published over 50 papers.
Affiliations and expertise
Professor, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, China; Vice Dean, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, ChinaHL
Haijun Liu
Research Assistant, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, China. He received his B.Eng, M.Eng and Ph.D degree from University of Electronic Science and Technology of China in 2011, 2014 and 2019, and has been a visiting scholar of Kyoto University from 2018 to 2019. His main research interests include manifold learning, metric learning, deep learning, subspace clustering and sparse representation in computer vision and machine learning, with focuses on human action detection and recognition, face detection and recognition, person detection and re-identification, remote sensing image processing, and medical image analysis.
Affiliations and expertise
Research Assistant, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, ChinaCS
Cong Shi
Cong Shi is a Research Professor in the School of Microelectronics and Communication Engineering, at Chongqing University, China. He received his PhD from Tsinghua University and has held the position of Postdoctoral Fellow with the Schepens Eye Research Institute, at Harvard Medical School. His research focuses on AI-based visual processing system-on-chips, and algorithm hardware co-design techniques. He has published over 30 papers.
Affiliations and expertise
Research Professor, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, ChinaJL
Ji Liu
Ji Liu is the Head of the AI platform department and the director of the Seattle AI lab for Kwai Inc. He has previously been a faculty member in computer science at the University of Rochester, USA. He received his PhD from the University of Wisconsin-Madison. His research includes machine learning, optimization, computer vision, reinforcement learning, and other areas. He has published over 100 papers.
Affiliations and expertise
Head, AI Platform Department, Seattle AI Lab, Kwai Inc., Seattle, Washington, United States of America; Director, Seattle AI Lab, Kwai Inc., Seattle, Washington, USARead Deep Learning on Edge Computing Devices on ScienceDirect