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Computer Architecture
A Quantitative Approach
- 7th Edition - January 1, 2025
- Authors: John L. Hennessy, David A. Patterson, Christos Kozyrakis
- Language: English
- Paperback ISBN:9 7 8 - 0 - 4 4 3 - 1 5 4 0 6 - 5
- eBook ISBN:9 7 8 - 0 - 4 4 3 - 1 5 4 0 7 - 2
Computer Architecture: A Quantitative Approach, has been considered essential reading by instructors, students and practitioners of computer design for nearly 30 years. The sevent… Read more
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Institutional subscription on ScienceDirect
Request a sales quoteComputer Architecture: A Quantitative Approach, has been considered essential reading by instructors, students and practitioners of computer design for nearly 30 years. The seventh edition of this classic textbook from John Hennessy and David Patterson, w
- Winner of a 2019 Textbook Excellence Award (Texty) from the Textbook and Academic Authors Association
- Each chapter follows a consistent framework: explanation of the ideas in each chapter; a "crosscutting issues" section, which presen
Students taking computer architecture courses at the graduate level / Navstem estimates the current annual enrollment for computer architecture in the US at 9,500 students
Printed Text
1. Fundamentals of Quantitative Design and Analysis
2. Memory Hierarchy Design
3. Instruction-Level Parallelism and Its Exploitation
4. Data-Level Parallelism in Vector, SIMD, and GPU Architectures
5. Multiprocessors and Thread-Level Parallelism
6. The Warehouse-Scale Computer
7. Domain Specific Architectures
A. Instruction Set Principles
B. Review of Memory Hierarchy
C. Pipelining: Basic and Intermediate Concepts
Online
D. Storage Systems
E. Embedded Systems
F. Interconnection Networks
G. Vector Processors
H. Hardware and Software for VLIW and EPIC
I. Large-Scale Multiprocessors and Scientific Applications
J. Computer Arithmetic
K. Survey of Instruction Set Architectures
L. Advanced Concepts on Address Translation
M. Historical Perspectives and References
1. Fundamentals of Quantitative Design and Analysis
2. Memory Hierarchy Design
3. Instruction-Level Parallelism and Its Exploitation
4. Data-Level Parallelism in Vector, SIMD, and GPU Architectures
5. Multiprocessors and Thread-Level Parallelism
6. The Warehouse-Scale Computer
7. Domain Specific Architectures
A. Instruction Set Principles
B. Review of Memory Hierarchy
C. Pipelining: Basic and Intermediate Concepts
Online
D. Storage Systems
E. Embedded Systems
F. Interconnection Networks
G. Vector Processors
H. Hardware and Software for VLIW and EPIC
I. Large-Scale Multiprocessors and Scientific Applications
J. Computer Arithmetic
K. Survey of Instruction Set Architectures
L. Advanced Concepts on Address Translation
M. Historical Perspectives and References
- No. of pages: 936
- Language: English
- Edition: 7
- Published: January 1, 2025
- Imprint: Morgan Kaufmann
- Paperback ISBN: 9780443154065
- eBook ISBN: 9780443154072
JH
John L. Hennessy
ACM named John L. Hennessy a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. John L. Hennessy is a Professor of Electrical Engineering and Computer Science at Stanford University, where he has been a member of the faculty since 1977 and was, from 2000 to 2016, its tenth President. Prof. Hennessy is a Fellow of the IEEE and ACM; a member of the National Academy of Engineering, the National Academy of Science, and the American Philosophical Society; and a Fellow of the American Academy of Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and the 2000 John von Neumann Award, which he shared with David Patterson. He has also received seven honorary doctorates.
Affiliations and expertise
Departments of Electrical Engineering and Computer Science, Stanford University, USADP
David A. Patterson
David Patterson is the Pardee Professor of Computer Science, Emeritus at the University of California at Berkeley, which he joined after graduating from UCLA in 1977.His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Prof. Patterson received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions to RISC, and he shared the IEEE Johnson Information Storage Award for contributions to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize with John Hennessy. Like his co-author, Prof. Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the CS division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM. This record led to Distinguished Service Awards from ACM, CRA, and SIGARCH.
Affiliations and expertise
Pardee Professor of Computer Science, Emeritus, University of California at Berkeley, USACK
Christos Kozyrakis
Christos Kozyrakis is a Professor of Electrical Engineering and Computer Science at Stanford University. His primary research areas are computer architecture and computer systems. His current work focuses on cloud computing, systems for machine learning, and machine learning for systems. Christos holds a BS degree from the University of Crete and a PhD degree from the University of California at Berkeley. He is a fellow of the ACM and the IEEE. He has received the ACM SIGARCH Maurice Wilkes Award, the ISCA Influential Paper Award, the NSF Career Award, the Okawa Foundation Research Grant, and faculty awards by IBM, Microsoft, and Google.
Affiliations and expertise
Departments of Electrical Engineering and Computer Science, Stanford University, Stanford, CA