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ASIC and FPGA Verification
A Guide to Component Modeling
- 1st Edition - September 29, 2004
- Author: Richard Munden
- Language: English
- Paperback ISBN:9 7 8 - 0 - 1 2 - 5 1 0 5 8 1 - 1
- eBook ISBN:9 7 8 - 0 - 0 8 - 0 4 7 5 9 2 - 9
Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on… Read more
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Request a sales quoteRichard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today’s digital designs. ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs.
- Provides numerous models and a clearly defined methodology for performing board-level simulation
- Covers the details of modeling for verification of both logic and timing
- First book to collect and teach techniques for using VHDL to model "off-the-shelf" or "IP" digital components for use in FPGA and board-level design verification
Digital system designers and industry short courses focused on component modeling
1.Introduction to Board-Level Verification; 2.Tour of a simple model; 3.VHDL packages for component models; 4.Introduction to SDF; 5.Anatomy of a VITAL Model; 6.Modeling Delays; 7.VITAL truth tables; 8.Modeling timing constraints; 9.Modeling registered devices; 10.Conditional delays and timing constraints; 11.Negative timing constraints; 12.Timing Files and Backannotation; 13.Adding Timing to Your RTL Code; 14.Modeling Memories; 15.Considerations for Component Modeling; 16.Modeling Component Centric Features; 17.Testbenches for Component Models
- No. of pages: 336
- Language: English
- Edition: 1
- Published: September 29, 2004
- Imprint: Morgan Kaufmann
- Paperback ISBN: 9780125105811
- eBook ISBN: 9780080475929
RM
Richard Munden
Affiliations and expertise
CEO, Free Model FoundryRead ASIC and FPGA Verification on ScienceDirect