Shared Memory Application Programming
Concepts and Strategies in Multicore Application Programming
- 1st Edition - October 27, 2015
- Imprint: Morgan Kaufmann
- Author: Victor Alessandrini
- Language: English
- Paperback ISBN:9 7 8 - 0 - 1 2 - 8 0 3 7 6 1 - 4
- eBook ISBN:9 7 8 - 0 - 1 2 - 8 0 3 8 2 0 - 8
Shared Memory Application Programming presents the key concepts and applications of parallel programming, in an accessible and engaging style applicable to developers across ma… Read more
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Request a sales quoteShared Memory Application Programming presents the key concepts and applications of parallel programming, in an accessible and engaging style applicable to developers across many domains. Multithreaded programming is today a core technology, at the basis of all software development projects in any branch of applied computer science. This book guides readers to develop insights about threaded programming and introduces two popular platforms for multicore development: OpenMP and Intel Threading Building Blocks (TBB). Author Victor Alessandrini leverages his rich experience to explain each platform’s design strategies, analyzing the focus and strengths underlying their often complementary capabilities, as well as their interoperability.
The book is divided into two parts: the first develops the essential concepts of thread management and synchronization, discussing the way they are implemented in native multithreading libraries (Windows threads, Pthreads) as well as in the modern C++11 threads standard. The second provides an in-depth discussion of TBB and OpenMP including the latest features in OpenMP 4.0 extensions to ensure readers’ skills are fully up to date. Focus progressively shifts from traditional thread parallelism to modern task parallelism deployed by modern programming environments. Several chapter include examples drawn from a variety of disciplines, including molecular dynamics and image processing, with full source code and a software library incorporating a number of utilities that readers can adapt into their own projects.
- Designed to introduce threading and multicore programming to teach modern coding strategies for developers in applied computing
- Leverages author Victor Alessandrini's rich experience to explain each platform’s design strategies, analyzing the focus and strengths underlying their often complementary capabilities, as well as their interoperability
- Includes complete, up-to-date discussions of OpenMP 4.0 and TBB
- Based on the author’s training sessions, including information on source code and software libraries which can be repurposed
Engineers and computer scientists working in applied computing with basic C/C++ programming skills
- Pedagogical Objectives
- Programming Environments
- Book Organization
- Abstract
- 1.1 Processes and Threads
- 1.2 Overview of Computing Platforms
- 1.3 Memory System of Computing Platforms
- 1.4 Parallel Processing Inside Cores
- 1.5 External Computational Devices
- 1.6 Final Comments
- Abstract
- 2.1 Applications and Processes
- 2.2 Multithreaded Processes
- 2.3 Programming and Execution Models
- 2.4 Benefits of Concurrent Programming
- Abstract
- 3.1 Introduction
- 3.2 Overview of Basic Libraries
- 3.3 Overview of Basic Thread Management
- 3.4 Using Posix Threads
- 3.5 Using Windows Threads
- 3.6 C++11 Thread Library
- 3.7 SPool Utility
- 3.8 SPool Examples
- 3.9 First Look at OpenMP
- 3.10 Database Search Example
- 3.11 Conclusions
- 3.12 Annex: Coding C++11 Time Durations
- Abstract
- 4.1 Introduction
- 4.2 Some Library Functions are not Thread Safe
- 4.3 Dealing with Random Number Generators
- 4.4 Thread Local Storage Services
- 4.5 Second Example: A Gaussian Random Generator
- 4.6 Comments on Thread Local Storage
- 4.7 Conclusion
- Abstract
- 5.1 First Comments on Thread Synchronization
- 5.2 Need for Mutual Exclusion Among Threads
- 5.3 Different Kinds of Mutex Flavors
- 5.4 Pthreads Mutual Exclusion
- 5.5 Other Simple Examples
- 5.6 Windows Mutual Exclusion
- 5.7 OpenMP Mutual Exclusion
- 5.8 C++11 Mutual Exclusion
- 5.9 TBB Mutual Exclusion
- 5.10 First Look at Atomic Operations
- 5.11 Container Thread Safety
- 5.12 Comments on Mutual Exclusion Best Practices
- Abstract
- 6.1 Idle Waits Versus Spin Waits
- 6.2 Condition Variables in Idle Waits
- 6.3 Idle Waits in Pthreads
- 6.4 Windows Condition Variables
- 6.5 C++11 condition_variable Class
- 6.6 Examples of Idle Wait
- 6.7 C++11 Futures and Promises
- Abstract
- 7.1 Introduction
- 7.2 Cache Coherency Issue
- 7.3 What is a Memory Consistency Model?
- 7.4 Weak-Ordering Memory Models
- 7.5 Pthreads Memory Consistency
- 7.6 OpenMP Memory Consistency
- Abstract
- 8.1 Introduction
- 8.2 C++11 std::atomic<T> Class
- 8.3 Lock-Free Algorithms
- 8.4 Synchronizing Thread Operations
- 8.5 Examples of Atomic Synchronizations
- 8.6 TBB atomic<T> Class
- 8.7 Windows Atomic Services
- 8.8 Summary
- Abstract
- 9.1 Introduction and Overview
- 9.2 General Comments on High-Level Synchronization Tools
- 9.3 Overview of the vath Synchronization Utilities
- 9.4 Timers
- 9.5 Boolean Locks
- 9.6 SynchP< T > Template Class
- 9.7 Idle and Spin Barriers
- 9.8 Blocking Barriers
- 9.9 ThQueue<T> Class
- 9.10 Reader-Writer Locks
- 9.11 RWlock Class
- 9.12 General Overview of Thread Pools
- Abstract
- Overview
- 10.1 Basic Execution Model
- 10.2 Configuring OpenMP
- 10.3 Thread Management and Work-Sharing Directives
- 10.4 Synchronization Directives
- 10.5 Examples of Parallel and Work-Sharing Constructs
- 10.6 Task API
- 10.7 Task Examples
- 10.8 Task Best Practices
- 10.9 Cancellation of Parallel Constructs
- 10.10 Offloading Code Blocks to Accelerators
- 10.11 Thread Affinity
- 10.12 Vectorization
- 10.13 Annex: SafeCounter Utility Class
- Abstract
- 11.1 Overview
- 11.2 TBB Content
- 11.3 TBB Initialization
- 11.4 Operation of the High-Level Algorithms
- 11.5 Simple parallel_for Example
- Abstract
- 12.1 Introduction
- 12.2 SPool Reviewed
- 12.3 NPool Features
- 12.4 NPool API
- 12.5 Building Parallel Jobs
- 12.6 Operation of the NPool
- 12.7 Examples
- 12.8 Running Parallel Routines in Parallel
- 12.9 Hybrid MPI-Threads Example
- Abstract
- 13.1 Introduction
- 13.2 Molecular Dynamics Problem
- 13.3 Integration of the Equations of Motion
- 13.4 Md.C Sequential Code
- 13.5 Parallel Implementations of Md.C
- Abstract
- 14.1 Introduction
- 14.2 Relaxation Methods
- 14.3 First Example: Heat.C
- 14.4 Parallel Implementation of Heat.C
- 14.5 Heat Performance Issues
- 14.6 Second Example: Sor.C
- 14.7 Parallel Implementations of Sor.C
- 14.8 Sor Performance Issues
- 14.9 Alternative Approach to Data Dependencies
- Abstract
- 15.1 Pipeline Concurrency Pattern
- 15.2 Example 1: Two-Dimensional Heat Propagation
- 15.3 Sequential Code Heat.C
- 15.4 Pipelined Versions
- 15.5 Pipeline Classes
- 15.6 Example: Pipelined Sor
- 15.7 Pipelining Threads in TBB
- 15.8 Some Performance Considerations
- 15.9 Annex: Solution to the Heat Diffusion Equation
- 15.10 Annex: FFT Routines
- Abstract
- 16.1 Introduction
- 16.2 Structure of the TBB Pool
- 16.3 TBB Task Management Classes
- 16.4 Complete Scheduler API: The Task Class
- 16.5 Miscellaneous Task Features
- 16.6 Using the TBB Scheduler
- 16.7 Job Submission by Client Threads
- 16.8 Example: Molecular Dynamics Code
- 16.9 Recycling Parallel Region Tasks
- 16.10 Annex: Task Class Member Functions
- A.1 Libraries Required
- A.2 Software Organization
- A.3 vath Classes
- B.1 Function Objects
- B.2 Function Object Syntax
- B.3 Lambda Expressions
- Edition: 1
- Published: October 27, 2015
- No. of pages (Paperback): 556
- No. of pages (eBook): 556
- Imprint: Morgan Kaufmann
- Language: English
- Paperback ISBN: 9780128037614
- eBook ISBN: 9780128038208
VA
Victor Alessandrini
After obtaining a PhD in theoretical physics in Argentina – where he was born – he spent several years as visiting scientist, working in theoretical particle physics in different research laboratories in the USA and Europe, in particular at the CERN theory division. In 1978, he was appointed full professor at the University of Paris XI in Orsay, France. His basic interests shifted to computational sciences in the early 90’s, and he was at this time the founding director of IDRIS supercomputing center in Orsay, which he directed until 2009. In 2004-2009, he coordinated the DEISA European supercomputing infrastructure, a consortium of national supercomputing centers that pioneered the deployment of high performance computing services au the continental scale. He is currently emeritus research director at “Maison de la Simulation”, a CEA-CNRS-INRIA-University research laboratory providing high level support to HPC. He was decorated in 2011 “Chevalier de l’Ordre National du Mérite” by the French Republic.
Affiliations and expertise
Emeritus Research Director, Centre National pour la Recherche Scientifique (CNRS), FranceRead Shared Memory Application Programming on ScienceDirect