Fully Depleted Silicon-On-Insulator
Nanodevices, Mechanisms and Characterization
- 1st Edition - August 4, 2021
- Imprint: Elsevier
- Author: Sorin Cristoloveanu
- Language: English
- Paperback ISBN:9 7 8 - 0 - 1 2 - 8 1 9 6 4 3 - 4
- eBook ISBN:9 7 8 - 0 - 1 2 - 8 2 3 1 6 5 - 4
Fully Depleted Silicon-On-Insulator provides an in-depth presentation of the fundamental and pragmatic concepts of this increasingly important technology. There are two main tec… Read more
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Request a sales quoteFully Depleted Silicon-On-Insulator provides an in-depth presentation of the fundamental and pragmatic concepts of this increasingly important technology.
There are two main technologies in the marketplace of advanced CMOS circuits: FinFETs and fully depleted silicon-on-insulators (FD-SOI). The latter is unchallenged in the field of low-power, high-frequency, and Internet-of-Things (IOT) circuits. The topic is very timely at research and development levels. Compared to existing books on SOI materials and devices, this book covers exhaustively the FD-SOI domain.
Fully Depleted Silicon-On-Insulator
is based on the expertise of one of the most eminent individuals in the community, Dr. Sorin Cristoloveanu, an IEEE Andrew Grove 2017 award recipient "For contributions to silicon-on-insulator technology and thin body devices." In the book, he shares key insights on the technological aspects, operation mechanisms, characterization techniques, and most promising emerging applications.Early praise for Fully Depleted Silicon-On-Insulator
"FDSOI technology is poised to catch an increasingly large portion of the semiconductor market. This book fits perfectly in this new paradigm [...] It covers many SOI topics which have never been described in a book before." --
Professor Jean-Pierre Colinge, Formerly at TSMC and then at CEA-LETI, Grenoble, France"This book, written by one of the true experts and pioneers in the silicon-on-insulator field, is extremely timely because of the growing footprint of FD-SOI in modern silicon technology, especially in IoT applications. Written in a delightfully informal style yet comprehensive in its coverage, the book describes both the device physics underpinning FD-SOI technology and the cutting-edge, perhaps even futuristic devices enabled by it." --
Professor Alexander Zaslavsky, Brown University, USA"A superbly written book on SOI technology by a master in the field." --
Professor Yuan Taur, University of California, San Diego, USA"The author is a world-top researcher of SOI device/process technology. This book is his masterpiece and important for the FD-SOI archive. The reader will learn much from the book." --
Professor Hiroshi Iwai, National Yang Ming Chiao Tung University, TaiwanFrom the author
- Written by a top expert in the silicon-on-insulator community and IEEE Andrew Grove 2017 award recipient
- Comprehensively addresses the technology aspects, operation mechanisms and electrical characterization techniques for FD-SOI devices
- Discusses FD-SOI’s most promising device structures for memory, sensing and emerging applications
Materials Scientists and Electrical Engineers in academia and R&D, graduate students, device-physics specialists
- Cover image
- Title page
- Table of Contents
- Copyright
- Dedication
- Preface
- The SOI saga
- Myths, truths, and common mistakes
- This book
- Part I: Technology
- Chapter 1: FD-SOI technology
- Abstract
- 1.1. Smart-Cut for FD-SOI
- 1.2. Innovative Smart-Cut structures
- 1.3. Different SOI materials
- 1.4. CMOS technology for FD-SOI
- 1.5. FD-SOI circuits and products
- References
- Part II: Mechanisms in FD-SOI MOSFET
- Chapter 2: Coupling effects
- Abstract
- 2.1. Basic equations
- 2.2. Interface coupling
- 2.3. Supercoupling
- 2.4. Volume inversion
- 2.5. Virtual double-gate operation
- 2.6. Mobility coupling effects
- 2.7. Substrate depletion
- 2.8. Coupling in SOI FinFETs
- References
- Chapter 3: Scaling effects
- Abstract
- 3.1. Threshold voltage roll-off
- 3.2. Drain-induced barrier lowering
- 3.3. Drain-induced virtual substrate biasing
- 3.4. Mobility collapse
- 3.5. High-field transport
- 3.6. Other short-channel effects
- 3.7. Film thinning
- 3.8. Narrow-channel effects
- References
- Chapter 4: Floating-body effects
- Abstract
- 4.1. Kink effect
- 4.2. Hysteresis and latch
- 4.3. Parasitic bipolar transistor
- 4.4. Gate-induced floating-body effect
- 4.5. Metastable dip
- 4.6. Transient effects
- 4.7. The nameless effect
- References
- Part III: Electrical characterization techniques for FD-SOI structures
- Chapter 5: The pseudo-MOSFET
- Abstract
- 5.1. Fundamentals
- 5.2. FD-SOI specifics
- 5.3. Split-capacitance and conductance
- 5.4. Low-frequency noise
- 5.5. Magnetoresistance
- 5.6. Other facets of the Ψ-MOSFET
- 5.7. Applications
- References
- Chapter 6: Diode-based characterization methods
- Abstract
- 6.1. Split-capacitance in gated PIN diodes
- 6.2. Reverse recovery transient in PIN diodes
- 6.3. Lifetime evaluation in double-gate PIN diodes
- 6.4. Charge pumping
- References
- Chapter 7: Characterization methods for FD-SOI MOSFET
- Abstract
- 7.1. Basic methods
- 7.2. The Y-function
- 7.3. McLarty technique
- 7.4. Split-capacitance
- 7.5. Double derivative of drain current
- 7.6. Transconductance-to-current ratio
- 7.7. Geometrical magnetoresistance
- 7.8. Low-frequency noise and fluctuations
- 7.9. Channel separation in SOI FinFETs
- 7.10. Characterization of 3D multichannel transistors
- References
- Part IV: Innovative FD-SOI devices
- Chapter 8: Electrostatic doping and related devices
- Abstract
- 8.1. Concept
- 8.2. Electrostatic doping by workfunction tuning
- 8.3. Programmable Schottky contacts
- 8.4. The virtual FD-SOI diode
- 8.5. Other electrostatically doped FD-SOI devices
- References
- Chapter 9: Band-modulation devices
- Abstract
- 9.1. Steady-state characteristics
- 9.2. Modeling
- 9.3. Z2-FET capacitorless memory
- 9.4. Other applications
- 9.5. Z3-FET and other variants
- References
- Chapter 10: Emerging devices
- Abstract
- 10.1. Floating-body memories (1T-DRAM)
- 10.2. Tunneling transistor (TFET)
- 10.3. Alternative sharp-switching devices
- 10.4. The four-gate transistor
- 10.5. Junctionless transistors
- 10.6. Nanowires and quantum devices
- 10.7. BIMOS and spiking neurons
- References
- FD-SOI teasers
- SOI shootings
- SOI camel odyssey
- SOI quantum dots
- SOI caps
- 12 wafers
- 3 gloves
- FD-SOI experts
- SOI helicopters
- Cleanroom cigarettes
- Anneal timing
- Index
- Edition: 1
- Published: August 4, 2021
- Imprint: Elsevier
- No. of pages: 384
- Language: English
- Paperback ISBN: 9780128196434
- eBook ISBN: 9780128231654
SC
Sorin Cristoloveanu
Sorin Cristoloveanu received the PhD (1976) in Electronics and the French Doctorat ès-Sciences in Physics (1981) from Grenoble Polytechnic Institute, France. He is currently Director of Research CNRS. He also worked at JPL (Pasadena), Motorola (Phoenix), and the Universities of Maryland, Florida, Vanderbilt, Western Australia, and Kyungpook (World Class University project). He served as the director of the LPCS Laboratory and the Center for Advanced Projects in Microelectronics, initial seed of Minatec center. He authored more than 1,100 technical journal papers and communications at international conferences (including 170 invited contributions). He is the author or the editor of 36 books, and he has organized 35 international conferences. His expertise is in the area of the electrical characterization and modeling of semiconductor materials and devices, with special interest for silicon-on-insulator structures. He has supervised more than 100 PhD completions. He is the recipient of the IEEE Andy Grove award 2017. With his students, he has received 17 Best Paper Awards, an Academy of Science Award (1995), and the Electronics Division Award of the Electrochemical Society (2002). He is a Fellow of IEEE, a Fellow of the Electrochemical Society, a Distinguished Lecturer of the Electron Device Society, and Editor of Solid-State Electronics.
Affiliations and expertise
Director of Research CNRS, Paris, FranceRead Fully Depleted Silicon-On-Insulator on ScienceDirect