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FinFET/GAA Modeling for IC Simulation and Design
Using the BSIM-CMG Standard
- 2nd Edition - August 1, 2024
- Authors: Yogesh Singh Chauhan, Girish Pahwa, Avirup Dasgupta, Darsen Lu, Sriramkumar Vanugopalan, Sourabh Khandelwal, Juan Pablo Duarte, Navid Payvadosi, Ali Niknejad, Chenming Hu, S. Salahuddin
- Language: English
- Paperback ISBN:9 7 8 - 0 - 3 2 3 - 9 5 7 2 9 - 8
FinFET/GAA Modeling for IC Simulation and Design: Using the BSIM-CMG Standard, Second Edition is the first to book to explain FinFET modeling for IC simulation and the industry… Read more
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Request a sales quoteFinFET/GAA Modeling for IC Simulation and Design: Using the BSIM-CMG Standard, Second Edition is the first to book to explain FinFET modeling for IC simulation and the industry standard – BSIM-CMG - describing the rush in demand for advancing the technology from planar to 3D architecture as now enabled by the approved industry standard. The book gives a strong foundation on the physics and operation of FinFET, details aspects of the BSIM-CMG model such as surface potential, charge and current calculations, and includes a dedicated chapter on parameter extraction procedures, thus providing a step-by-step approach for the efficient extraction of model parameters.
With this book, users will learn Why you should use FinFET, The physics and operation of FinFET Details of the FinFET standard model (BSIM-CMG), Parameter extraction in BSIM-CMG FinFET circuit design and simulation, and more.
- Authored by the lead inventor and developer of FinFET and developers of the BSIM-CM standard model, providing an experts’ insight into the specifications of the standard
- Presents the first book on the industry-standard FinFET model - BSIM-CMG
- Includes a new chapter that provides a comprehensive introduction to GAA, including motivations, device concepts, structure, fabrication steps, benefits, and the industry standard GAA model
- Covers the recent developments in the BSIM-CMG model
- Updates on RF modeling of FinFET using BSIM-CMG model, including parameter extraction
Device modelers, circuit designers, graduate students in electronic engineering
- FinFET—From device concept to standard compact model
- Compact models for analog and RF applications
- Core model for FinFETs
- Gate-all-around FETs
- Channel current and real device effects
- Leakage currents
- Charge, capacitance, and nonquasi-static effects
- Parasitic resistances and capacitances
- Noise
- Junction diode I-V and C-V models
- Benchmark tests for compact models
- BSIM-CMG model parameter extraction
- Temperature dependence
- Cryogenic temperature modelling
- No. of pages: 352
- Language: English
- Edition: 2
- Published: August 1, 2024
- Imprint: Academic Press
- Paperback ISBN: 9780323957298
YC
Yogesh Singh Chauhan
Yogesh Singh Chauhan is a Professor at the Indian Institute of Technology in Kanpur, India. He is the developer of several industry standard SPICE models, including the ASM-HEMT model and the BSIMBULK (formerly BSIM6), BSIM-CMG, BSIM-IMG, BSIM4, and BSIM-SOI models. His research interests encompass the characterization, modeling, and simulation of semiconductor devices and RF circuit design. He is a Fellow of IEEE and the Indian National Academy of Engineering. He is the Editor of IEEE Transactions on Electron Devices and Distinguished Lecturer of the IEEE Electron Devices Society. He is the chairperson of the IEEE-EDS Compact Modeling Committee and IEEE Uttar Pradesh section. He has published more than 400 papers in international journals and conference proceedings.
Affiliations and expertise
Professor, Department of Electrical Engineering, Indian Institute of Technology, Kanpur, IndiaGP
Girish Pahwa
Girish Pahwa is an Assistant Professor, at the International College of Semiconductor Technology, National Yang Ming Chiao Tung University, Hsinchu City, Taiwan. His research interests include modeling, simulation, and device–circuit co-design of advanced and emerging transistor technologies, especially ferroelectric devices, cryogenic-CMOS, and oxide semiconductors.
Affiliations and expertise
Assistant Professor, International College of Semiconductor Technology, National Yang Ming Chiao Tung University, Hsinchu City, TaiwanAD
Avirup Dasgupta
Avirup Dasgupta is an assistant professor in the Dept. of Electronics and Communication Engineering at the Indian Institute of Technology Roorkee (IITR). Prof. Dasgupta completed his undergraduate, graduate and doctoral studies at the Indian Institute of Technology Kanpur (IITK). He worked as the manager of the Berkeley Device Modeling Center and as a postdoctoral scholar in the BSIM group at the Dept. of Electrical Engineering and Computer Science, University of California Berkeley.
Prof. Dasgupta's work primarily involves the analysis, modeling and design of semiconductor devices. One of the key areas of thier work is to develop compact models for SPICE simulations. They continue to be a part of the BSIM group and the Berkeley Device Modeling Centre (BDMC). He is a co-developer of the industry standard BSIM-BULK, BSIM-IMG, BSIM-CMG, BSIM-SOI, ASM-HEMT and IITK-RPTM models.
Affiliations and expertise
Assistant Professor, Dept. of Electronics and Communication Engineering, Indian Institute of Technology - Roorkee, Uttarakhand, IndiaDL
Darsen Lu
Darsen Lu was one of the key contributors of the industry standard FinFET compact model, BSIM-CMG, and thin-body SOI compact model, BSIM-IMG. He received the B.S. degree in electrical engineering in 2005, from National Tsing Hua University, Hsinchu, Taiwan, and the M.S. and Ph.D. degrees in electrical engineering from the University of California, Berkeley, in 2007 and 2011. From 2011, he was a Research Scientist with the IBM Thomas J. Watson Research Center, Yorktown Heights, NY, and now is Associate Professor in the Dept. of Electrical Engineering at the National Cheng Kung University in Taiwan. His current research focuses on the modeling of novel semiconductor devices such as SiGe FinFETs, phase change memory and carbon-based transistors.
Affiliations and expertise
Thomas J. Watson Research Center 1101 Kitchawan Road, Yorktown Heights, New York, United States of AmericaSV
Sriramkumar Vanugopalan
Sriramkumar Venugopalan received his MS and Ph.D. degree in Electrical Engineering at University of California, Berkeley and his Bachelors degree from Indian Institute of Technology (IIT) Kanpur. While at Berkeley he worked in the BSIM Group and pursued research and development of multi-gate transistor compact SPICE models that contributed to the industry standard BSIM-CMG model. He has authored and co-authored more than 30 research papers in the area of semiconductor device SPICE models and integrated circuit design.
Affiliations and expertise
Skyworks Solutions, CA, USASK
Sourabh Khandelwal
Sourabh Khandelwal is currently Associate Professor at the Macquarie University in Sydney, Australia. Previously, they were a Postdoctoral Researcher in the BSIM Group, University of California, Berkeley. Sourabh received his PhD degree from Norwegian University of Science and Technology in 2013 and Masters’ degree from Indian Institute of Technology (IIT) Bombay in 2007. From 2007 – 2010 he worked as a Research Engineer at IBM Semiconductor Research and Development Centre, developing compact models for RF SOI devices. He holds a patent and has authored several research papers in the area of device modeling and characterization. His PhD work on GaN compact model is under consideration for industry standardization by the Compact Model Coalition.
Affiliations and expertise
Associate Professor, Macquarie University, Sydney, AustraliaJD
Juan Pablo Duarte
Juan Pablo Duarte Sepúlveda is currently working toward his PhD. degree at the University of California, Berkeley. He received his BS (2010) and MS (2012) degrees in Electrical Engineering from Korea Advanced Institute of Science and Technology (KAIST). He held a position as a lecturer at Universidad Tecnica Federico Santa Maria, Valparaiso, Chile, in 2012. He has authored many papers in nanoscale semiconductor device modeling and characterization. He received the Best Student Paper Award at the 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) for the paper “Unified FinFET Compact Model: Modelling Trapezoidal Triple-Gate FinFETs”.
Affiliations and expertise
University of California, Berkeley, USANP
Navid Payvadosi
Navid Paydavosi received his Ph.D. degree in Micro-Electro-Mechanical Systems (MEMS) and Nanosystems from the University of Alberta, Canada in 2011. He worked for the BSIM Group at University of California, Berkeley as a post-doctoral scholar from 2012 to 2014. He has published several research papers on the theory and modeling of modern Si-MOSFETs and its future alternatives, including carbon-based and III-V high electron mobility devices. Currently Dr. Paydavosi is with Intel Corp., Oregon as a device engineer working on process technology development.
Affiliations and expertise
Device Engineer, Intel Corp., Oregon, USAAN
Ali Niknejad
Ali M. Niknejad received the B.S.E.E. degree from the University of California, Los Angeles, in 1994, and his Master’s and Ph.D. degrees in electrical engineering from the University of California, Berkeley, in 1997 and 2000. He is currently a professor in the EECS department at UC Berkeley and Faculty Director of the Berkeley Wireless Research Center (BWRC) Group. Prof. Niknejad is the recipient of the 2012 ASEE Frederick Emmons Terman Award for his work and textbook on electromagnetics and RF integrated circuits. He has co-authored over 200 conference and journal publications in the field of integrated circuits and device compact modeling. His focus areas of his research include analog, RF, mixed-signal, mm-wave circuits, device physics and compact modeling, and numerical techniques in electromagnetics.
Affiliations and expertise
Professor, EECS Department, UC Berkeley, USACH
Chenming Hu
Chenming Hu is Distinguished Chair Professor Emeritus at UC Berkeley. He was the Chief Technology Officer of TSMC and founder of Celestry Design Technologies. He is best known for developing the revolutionary 3D transistor FinFET that powers semiconductor chips beyond 20nm. He also led the development of BSIM-- the industry standard transistor model that is used in designing most of the integrated circuits in the world. He is a member of the US Academy of Engineering, the Chinese Academy of Science, and Academia Sinica. His honors include the Asian American Engineer of the Year Award, IEEE Andrew Grove Award and Solid Circuits Award as well as Nishizawa Medal, and UC Berkeley's highest honor for teaching-- the Berkeley Distinguished Teaching Award.
Affiliations and expertise
Professor Emeritus, University of California, Berkeley, CA, USA