Digital Signal Processing 101
Everything You Need to Know to Get Started
- 1st Edition - April 5, 2010
- Imprint: Newnes
- Author: Michael Parker
- Language: English
- Paperback ISBN:9 7 8 - 1 - 8 5 6 1 7 - 9 2 1 - 8
- eBook ISBN:9 7 8 - 1 - 8 5 6 1 7 - 9 2 2 - 5
Digital Signal Processing 101: Everything You Need to Know to Get Started provides a basic tutorial on digital signal processing (DSP). Beginning with discussions of numeri… Read more
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Request a sales quoteDigital Signal Processing 101: Everything You Need to Know to Get Started provides a basic tutorial on digital signal processing (DSP). Beginning with discussions of numerical representation and complex numbers and exponentials, it goes on to explain difficult concepts such as sampling, aliasing, imaginary numbers, and frequency response. It does so using easy-to-understand examples and a minimum of mathematics. In addition, there is an overview of the DSP functions and implementation used in several DSP-intensive fields or applications, from error correction to CDMA mobile communication to airborne radar systems. This book is intended for those who have absolutely no previous experience with DSP, but are comfortable with high-school-level math skills. It is also for those who work in or provide components for industries that are made possible by DSP. Sample industries include wireless mobile phone and infrastructure equipment, broadcast and cable video, DSL modems, satellite communications, medical imaging, audio, radar, sonar, surveillance, and electrical motor control.
- Dismayed when presented with a mass of equations as an explanation of DSP? This is the book for you!
- Clear examples and a non-mathematical approach gets you up to speed with DSP
- Includes an overview of the DSP functions and implementation used in typical DSP-intensive applications, including error correction, CDMA mobile communication, and radar systems
Electrical engineers, software engineers, hardware engineers, system engineers and students with no DSP experience
IntroductionAcknowledgmentsChapter 1: Numerical Representation 1.1 Integer Fixed-Point Representation 1.2 Fractional Fixed-Point Representation 1.3 Floating-Point Representation Chapter 2: Complex Numbers and Exponentials 2.1 Complex Addition and Subtraction 2.2 Complex Multiplication 2.3 Complex Conjugate 2.4 The Complex Exponential 2.5 Measuring Angles in RadiansChapter 3: Sampling, Aliasing, and Quantization 3.1 Nyquist Sampling Rule 3.2 Quantization Chapter 4: Frequency Response 4.1 Frequency Response and the Complex Exponential 4.2 Normalizing Frequency Response 4.3 Sweeping across the Frequency Response 4.4 Example Frequency Responses 4.5 Linear Phase Response 4.6 Normalized Frequency Response Plots Chapter 5: Finite Impulse Response (FIR) Filters 5.1 FIR Filter Construction 5.2 Computing Frequency Response 5.3 Computing Filter Coefficients 5.4 Effect of Number of Taps on Filter Response Chapter 6: Windowing 6.1 Truncation of Coefficients 6.2 Tapering of Coefficients 6.3 Example Coefficient Windows Chapter 7: Decimation and Interpolation 7.1 Decimation 7.2 Interpolation 7.3 Resampling by Non-Integer Value Chapter 8: Infinite Impulse Response (IIR) Filters 8.1 IIR and FIR Filter Characteristic Comparison 8.2 Bilinear Transform 8.3 Frequency Prewarping Chapter 9: Complex Modulation and Demodulation 9.1 Modulation Constellations 9.2 Modulated Signal Bandwidth 9.3 Pulse-Shaping Filter 9.4 Raised Cosine Filter Chapter 10: Discrete and Fast Fourier Transforms (DFT, FFT) 10.1 DFT and IDFT Equations 10.2 Fast Fourier Transform (FFT) 10.3 Filtering Using the FFT and IFFT 10.4 Bit Growth in FFTs 10.5 Bit-Reversal AddressingChapter 11: Digital Upconversion and Downconversion 11.1 Digital Upconversion 11.2 Digital Downconversion 11.3 IF Subsampling Chapter 12: Error Correction Coding 12.1 Linear Block Encoding 12.2 Linear Block Decoding 12.3 Minimum Coding Distance 12.4 Convolutional Encoding 12.5 Viterbi Decoding 12.6 Soft Decision Decoding 12.7 Cyclic Redundancy Check 12.8 Shannon Capacity and Limit TheoremsChapter 13: Analog and TDMA Wireless Communications 13.1 Early Digital Innovations 13.2 Frequency Modulation 13.3 Digital Signal Processor 13.4 Digital Voice Phone Systems 13.5 TDMA Modulation and DemodulationChapter 14: CDMA Wireless Communications 14.1 Spread Spectrum Technology 14.2 Direct Sequence Spread Spectrum 14.3 Walsh Codes 14.4 Concept of CDMA 14.5 Walsh Code Demodulation 14.6 Network Synchronization 14.7 RAKE Receiver 14.8 Pilot PN Codes 14.9 CDMA Transmit Architecture 14.10 Variable Rate Vocoder 14.11 Soft Handoff 14.12 Uplink Modulation 14.13 Power Control 14.14 Higher Data Rates 14.15 Spectral Efficiency Considerations 14.16 Other CDMA TechnologiesChapter 15: OFDMA Wireless Communications 15.1 WiMax and LTE 15.2 OFDMA Advantages 15.3 Orthogonality of Periodic Signals 15.4 Frequency Spectrum of Orthogonal Subcarrier 15.5 OFDM Modulation 15.6 Intersymbol Interference and the Cyclic Prefix 15.7 MIMO Equalization 15.8 OFDMA System Considerations 15.9 OFDMA Spectral Efficiency 15.10 OFDMA Doppler Frequency Shift 15.11 Peak to Average Ratio 15.12 Crest Factor Reduction 15.13 Digital Predistortion 15.14 Remote Radio HeadChapter 16: Radar Basics 16.1 Radar Frequency Bands 16.2 Radar Antennas 16.3 Radar Range Equation 16.4 Stealth Aircraft 16.5 Pulsed Radar Operation 16.6 Pulse Compression 16.7 Pulse Repetition Frequency 16.8 Detection ProcessingChapter 17: Pulse Doppler Radar 17.1 Doppler Effect 17.2 Pulsed Frequency Spectrum 17.3 Doppler Ambiguities 17.4 Radar Clutter 17.5 PRF Trade-offs 17.6 Target TrackingChapter 18: Synthetic Array Radar 18.1 SAR Resolution 18.2 Pulse Compression 18.3 Azimuth Resolution 18.4 SAR Processing 18.5 SAR Doppler Processing 18.6 SAR ImpairmentsChapter 19: Introduction to Video Processing 19.1 Color Spaces 19.2 Interlacing 19.3 Deinterlacing 19.4 Image Resolution and Bandwidth 19.5 Chroma Scaling 19.6 Image Scaling and Cropping 19.7 Alpha Blending and Compositing 19.8 Video Compression 19.9 Video Interfaces Chapter 20: Implementation Using Digital Signal Processors 20.1 DSP Processor Architectural Enhancements 20.2 Scalability 20.3 Floating Point 20.4 Design Methodology 20.5 Managing Resources 20.6 EcosystemChapter 21: Implementation Using FPGAs 21.1 FPGA Design Methodology 21.2 DSP Processor or FPGA Choice 21.3 Design Methodology Considerations 21.4 Dedicated DSP Circuit Blocks in FPGAs 21.5 Floating Point in FPGAs 21.6 Ecosystem 21.7 Future TrendsAppendix A: Q Format Shift with Fractional MultiplicationAppendix B: Evaluation of FIR Design Error Minimization Appendix C: Laplace Transform Appendix D: Z-Transform Appendix E: Binary Field ArithmeticIndex
- Edition: 1
- Published: April 5, 2010
- No. of pages (Paperback): 264
- No. of pages (eBook): 264
- Imprint: Newnes
- Language: English
- Paperback ISBN: 9781856179218
- eBook ISBN: 9781856179225
MP
Michael Parker
Michael Parker is responsible for Intel’s FPGA division digital signal processing (DSP) product planning. This includes Variable Precision FPGA silicon architecture for DSP applications, DSP tool development, floating point tools, IP and video IP. He joined Altera (now Intel) in January 2007, and has over 20 years of previous DSP engineering design experience with companies such as Alvarion, Soma Networks, Avalcom, TCSI, Stanford Telecom and several startup companies. He holds an MSEE from Santa Clara University, and BSEE from Rensselaer Polytechnic Institute.
Affiliations and expertise
Senior DSP Technical Marketing Manager, Altera Corporation, San Jose, CA, USARead Digital Signal Processing 101 on ScienceDirect