Digital Design and Computer Architecture, RISC-V Edition
- 1st Edition - July 12, 2021
- Imprint: Morgan Kaufmann
- Authors: Sarah Harris, David Harris
- Language: English
- Paperback ISBN:9 7 8 - 0 - 1 2 - 8 2 0 0 6 4 - 3
- eBook ISBN:9 7 8 - 0 - 1 2 - 8 2 0 0 6 5 - 0
The newest addition to the Harris and Harris family of Digital Design and Computer Architecture books, this RISC-V Edition covers the fundamentals of digital logic design and reinf… Read more
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Request a sales quoteThe newest addition to the Harris and Harris family of Digital Design and Computer Architecture books, this RISC-V Edition covers the fundamentals of digital logic design and reinforces logic concepts through the design of a RISC-V microprocessor. Combining an engaging and humorous writing style with an updated and hands-on approach to digital design, this book takes the reader from the fundamentals of digital logic to the actual design of a processor. By the end of this book, readers will be able to build their own RISC-V microprocessor and will have a top-to-bottom understanding of how it works.
Beginning with digital logic gates and progressing to the design of combinational and sequential circuits, this book uses these fundamental building blocks as the basis for designing a RISC-V processor. SystemVerilog and VHDL are integrated throughout the text in examples illustrating the methods and techniques for CAD-based circuit design. The companion website includes a chapter on I/O systems with practical examples that show how to use SparkFun’s RED-V RedBoard to communicate with peripheral devices such as LCDs, Bluetooth radios, and motors.
This book will be a valuable resource for students taking a course that combines digital logic and computer architecture or students taking a two-quarter sequence in digital logic and computer organization/architecture.
- Covers the fundamentals of digital logic design and reinforces logic concepts through the design of a RISC-V microprocessor
- Gives students a full understanding of the RISC-V instruction set architecture, enabling them to build a RISC-V processor and program the RISC-V processor in hardware simulation, software simulation, and in hardware
- Includes both SystemVerilog and VHDL designs of fundamental building blocks as well as of single-cycle, multicycle, and pipelined versions of the RISC-V architecture
- Features a companion website with a bonus chapter on I/O systems with practical examples that show how to use SparkFun’s RED-V RedBoard to communicate with peripheral devices such as LCDs, Bluetooth radios, and motors
- The companion website also includes appendices covering practical digital design issues and C programming as well as links to CAD tools, lecture slides, laboratory projects, and solutions to exercises
- See the companion EdX MOOCs ENGR85A and ENGR85B with video lectures and interactive problems
Undergraduate electrical engineering, computer engineering or computer science students taking a combined digital logic design/computer architecture course. Industry professionals interested in understanding and using the open-source RISC-V architecture. Applicable courses or exams: Digital logic design and computer architecture, digital design, computer architecture, modern processor architecture
- Cover image
- Title page
- Table of Contents
- RISC-V Instruction Set Summary
- Copyright
- Preface
- Features
- Online Supplements
- How to use the Software Tools in a Course
- Labs
- RVfpga
- Bugs
- Acknowledgments
- About the Authors
- 1. From Zero to One
- Abstract
- 1.1 The Game Plan
- 1.2 The Art of Managing Complexity
- 1.3 The Digital Abstraction
- 1.4 Number Systems
- 1.5 Logic Gates
- 1.6 Beneath the Digital Abstraction
- 1.7 Cmos Transistors*
- 1.8 Power Consumption*
- 1.9 Summary and a Look Ahead
- Exercises
- Interview Questions
- 2. Combinational Logic Design
- Abstract
- 2.1 Introduction
- 2.2 Boolean Equations
- 2.3 Boolean Algebra
- 2.4 From Logic to Gates
- 2.5 Multilevel Combinational Logic
- 2.6 X’s and Z’s, Oh My
- 2.7 Karnaugh Maps
- 2.8 Combinational Building Blocks
- 2.9 Timing
- 2.10 Summary
- Exercises
- Interview Questions
- 3. Sequential Logic Design
- Abstract
- 3.1 Introduction
- 3.2 Latches and Flip-Flops
- 3.3 Synchronous Logic Design
- 3.4 Finite State Machines
- 3.5 Timing of Sequential Logic
- 3.6 Parallelism
- 3.7 Summary
- Exercises
- Interview Questions
- 4. Hardware Description Languages
- Abstract
- 4.1 Introduction
- 4.2 Combinational Logic
- 4.3 Structural Modeling
- 4.4 Sequential Logic
- 4.5 More Combinational Logic
- 4.6 Finite State Machines
- 4.7 Data Types*
- 4.8 Parameterized Modules*
- 4.9 Testbenches
- 4.10 Summary
- Exercises
- SystemVerilog Exercises
- VHDL Exercises
- Interview Questions
- 5. Digital Building Blocks
- Abstract
- 5.1 Introduction
- 5.2 Arithmetic Circuits
- 5.3 Number Systems
- 5.4 Sequential Building Blocks
- 5.5 Memory Arrays
- 5.6 Logic Arrays
- 5.7 Summary
- Exercises
- Interview Questions
- 6. Architecture
- Abstract
- 6.1 Introduction
- 6.2 Assembly Language
- 6.3 Programming
- 6.4 Machine Language
- 6.5 Lights, Camera, Action: Compiling, Assembling, and Loading*
- 6.6 Odds and Ends*
- 6.7 Evolution of the RISC-V Architecture
- 6.8 Another Perspective: x86 Architecture
- 6.9 Summary
- Exercises
- Interview Questions
- 7. Microarchitecture
- Abstract
- 7.1 Introduction
- 7.2 Performance Analysis
- 7.3 Single-Cycle Processor
- 7.4 Multicycle Processor
- 7.5 Pipelined Processor
- 7.6 HDL Representation*
- 7.7 Advanced Microarchitecture*
- 7.8 Real-World Perspective: Evolution of RISC-V Microarchitecture*
- 7.9 Summary
- Exercises
- Interview Questions
- 8. Memory Systems
- Abstract
- 8.1 Introduction
- 8.2 Memory System Performance Analysis
- 8.3 Caches
- 8.4 Virtual Memory
- 8.5 Summary
- Epilogue
- Exercises
- Interview Questions
- e9. Embedded I/O Systems
- Abstract
- 9.1 Introduction
- 9.2 Memory-Mapped I/O
- 9.3 Embedded I/O Systems
- 9.4 Other Microcontroller Peripherals
- 9.5 Summary
- eA. Digital System Implementation
- A.1 Introduction
- A.2 74xx LOGIC
- A.3 Programmable Logic
- A.4 Application-Specific Integrated Circuits
- A.5 Datasheets
- A.6 Logic Families
- A.7 Switches and Light-Emitting Diodes
- A.8 Packaging and Assembly
- A.9 Transmission Lines
- A.10 Economics
- B. RISC-V Instruction Set Summary
- eC. C Programming
- C.1 Introduction
- C.2 Welcome to C
- C.3 Compilation
- C.4 Variables
- C.5 Operators
- C.6 Function Calls
- C.7 Control-Flow Statements
- C.8 More Data Types
- C.9 Standard Libraries
- C.10 Compiler and Command Line Options
- C.11 Common Mistakes
- Further Reading
- Index
- RISC-V Instruction Set Summary
- Edition: 1
- Published: July 12, 2021
- No. of pages (Paperback): 592
- No. of pages (eBook): 592
- Imprint: Morgan Kaufmann
- Language: English
- Paperback ISBN: 9780128200643
- eBook ISBN: 9780128200650
SH
Sarah Harris
Sarah L. Harris is an Assistant Professor of Engineering at Harvey Mudd College. She received her Ph.D. and M.S. in Electrical Engineering from Stanford University. Before attending Stanford, she received a B.S. in Electrical and Computer Engineering from Brigham Young University. Sarah has also worked with Hewlett-Packard, the San Diego Supercomputer Center, Nvidia, and Microsoft Research in Beijing.
Sarah loves teaching, exploring and developing new technologies, traveling, wind surfing, rock climbing, and playing the guitar. Her recent exploits include researching sketching interfaces for digital circuit design, acting as a science correspondent for a National Public Radio affiliate, and learning how to kite surf. She speaks four languages and looks forward to learning more in the near future.
Affiliations and expertise
Assistant Professor of Engineering, Harvey Mudd College, Claremont, CA, USADH
David Harris
David Harris is the Harvey S. Mudd Professor of Engineering Design at Harvey Mudd College. He received his Ph.D. in electrical engineering from Stanford University and his M.Eng. in electrical engineering and computer science from MIT. Before attending Stanford, he worked at Intel as a logic and circuit designer on the Itanium and Pentium II processors. Since then, he has consulted at Sun Microsystems, Hewlett-Packard, Broadcom, and other design companies. David holds more than a dozen patents and is the author of three other textbooks on chip design, as well as many Southern California hiking guidebooks. When he is not working, he enjoys hiking, flying, and making things with his three sons.
Affiliations and expertise
Associate Professor of Engineering, Harvey Mudd College, Claremont, CA, USARead Digital Design and Computer Architecture, RISC-V Edition on ScienceDirect