Design Automation
Automated Full-Custom VLSI Layout Using the ULYSSES Design Environment
- 1st Edition - January 28, 1988
- Latest edition
- Author: Michael Bushnell
- Language: English
Design Automation: Automated Full-Custom VLSI Layout Using the ULYSSES Design Environment deals with the use of the Ulysses design environment for an automated full-custom VLSI… Read more
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Description
Description
Design Automation: Automated Full-Custom VLSI Layout Using the ULYSSES Design Environment deals with the use of the Ulysses design environment for an automated full-custom VLSI layout. Topics covered include VLSI chip design and design process, control mechanisms in Ulysses, and the use of artificial intelligence (AI) in design environments. An example design task is also presented. This book is comprised of 10 chapters and begins with an overview of VLSI computer-aided design (CAD), focusing on an expert system based design environment aimed at solving the CAD tool integration problem. An example CAD tool suite for such an environment is presented. The next chapter describes prior attempts at developing an integrated design environment, followed by a discussion on the computer-aided VLSI design process that motivated the development of the Ulysses design environment. The following chapters explore the use of AI techniques within Ulysses; the fundamental architecture of Ulysses; and the control mechanisms that govern the decision to execute various CAD tools, on particular files, within Ulysses. The implementation of Ulysses is also discussed. The final chapter demonstrates the feasibility of a knowledge-based design environment for VLSI chip design applications; the success of Ulysses at further automating the VLSI design process; and the usability of Ulysses as a VLSI design environment. This monograph will be a valuable resource for systems designers and other practitioners in computer science and computer engineering.
Table of contents
Table of contents
Acknowledgments
List of Figures
List of Tables
1. Introduction
1.1. Current State of VLSI Chip Design
1.1.1. VLSI Technology
1.1.2. The CAD Tools
1.1.3. Current CAD Methodology
1.1.4. Controlling the Tools
1.1.5. Unmet Needs
1.2. Solutions to CAD System Problems
1.3. An Example Design Task — Layout Synthesis
1.4. Outline
2. Prior Design Environments
2.1. Prior Design Environments
2.1.1. Designer's Workbench
2.1.2. Palladio
2.1.3. The USC Expert Synthesis System
2.1.4. Schema
2.1.5. Demeter
2.1.6. Electric
2.1.7. A Common Problem
2.2. CAD Tools That Should Be Environments
2.2.1. Silicon Compilers
2.2.2. Knowledge-Based Routers
2.3. Knowledge-Based CAD Tools
2.3.1. Design Methodology Programming with Dialog
2.3.2. The Redesign System
2.3.3. The SADD System
3. The VLSI Design Process
3.1. The Nature of Computer-Aided VLSI Design
3.2. VLSI Design Methodology
3.3. Required Abstractions for a Design Environment
3.4. Summary
4. Using AI in Environments
4.1. The Control Problem
4.2. The Design Detail Problem
4.3. The Programming Abstraction Problem
4.4. Summary
5· Architecture of the Environment
5.1. The Blackboard Model
5.2. The HASP/SIAP System
5.3. Data Structures for Ulysses
5.4. The Full Environment
6. Control Mechanisms in Ulysses
6.1. Motivation for the Scripts Language
6.2. Design Tasks and Exception Rules
6.3. Purpose of the Scripts Language
6.4. Scripts Language Features
6.4.1. Files Section
6.4.2. The Knowledge Source Section
6.4.3. The Task and Rule Sections
6.4.4. Collaborators and Cooperation
6.5. Ulysses — An Interactive Expert System
6.6. Ulysses and Theoretical Artificial Intelligence
6.6.1. Controlled Production Systems
6.6.2. The Organization Design Language
6.6.3. Automatic Rule Generation
6.7. Summary
7. An Example Design Task
7.1. The CMOS Layout Generation Task
7.2. Detailed Design Methodology
7.2.1. Knowledge Sources
7.2.2. Tasks and Rules
7.3. Experimental Results
7.3.1. Test Chip Description
7.3.2. Interim Design Descriptions
7.3.3. Significance of Consistency Rules
7.3.4. Discussion of the Design Activity Log
7.3.5. Comparison of Manual and Semi-Automatic Designs
7.3.6. Efficiency Considerations
7.4. Summary
8. Implementation of Ulysses
8.1. Goals for the Implementation
8.2. Scripts Pre Processor Sub-System
8.3. Command Sub-System
8.4. Scripts Preprocessor Run Time Sub-System
8.5. Modified Lisp Interpreter and Compiler
8.6. Remaining Subsystems
8.7. Summary
9· Suggestions for Future Research
10. Conclusions
10.1. A Working Design Environment
10.1.1. Automatic/Interactive CAD Tool Execution
10.1.2. Design Space Capture
10.1.3. The Scripts Design Methodology Language
10.2. Whole-Chip Layout Generation
10.3. Automatic Floor Plan Consistency Maintenance
10.4. A New Human/Expert System Interaction Style
10.5. Generalized Planning
10.6. Significance of the Work
Appendix A. Ulysses Scripts Language BNF
Appendix B. Scripts Language User Manual
B.1. Conventions
B.2. Syntax Restrictions
B.3. Scripts Program Section Ordering
B.4. Detailed Language Statements
Appendix C. Ulysses Command Language BNF
Appendix D. Command Language User Manual
D.1. Conventions
D.2. Detailed Command Descriptions
Appendix E. Design Manipulation Functions
E.1. Uniform System File Element Access Functions
E.2. System File Element Formats
Appendix F. Building and Using Ulysses
F.1. UNIX Directories for Running Ulysses
F.2. Procedures for Making Ulysses
F.3. Procedures for Using Ulysses
F.4. Coupling Ulysses with a User Interface
Appendix G. Lisp Status Variables for Ulysses
Appendix H. Ulysses Error Messages
H.1. Scripts Preprocessor Error Messages
H.2. Ulysses Runtime System Error Messages
References
Index
Product details
Product details
- Edition: 1
- Latest edition
- Published: December 2, 2012
- Language: English
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