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Computer Organization and Design
The Hardware/Software Interface
- 4th Edition - October 13, 2011
- Authors: David A. Patterson, John L. Hennessy
- Language: English
- Paperback ISBN:9 7 8 - 0 - 1 2 - 3 7 4 7 5 0 - 1
- eBook ISBN:9 7 8 - 0 - 0 8 - 0 8 8 6 1 3 - 8
Computer Organization and Design, Fourth Edition, has been updated with new exercises and improvements throughout suggested by instructors teaching from the book. It covers the… Read more
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Request a sales quoteComputer Organization and Design, Fourth Edition, has been updated with new exercises and improvements throughout suggested by instructors teaching from the book.
It covers the revolutionary change from sequential to parallel computing, with a chapter on parallelism and sections in every chapter highlighting parallel hardware and software topics. It includes an appendix by the Chief Scientist and the Director of Architecture of NVIDIA covering the emergence and importance of the modern GPU, describing in detail for the first time the highly parallel, highly multithreaded multiprocessor optimized for visual computing. A companion CD provides a toolkit of simulators and compilers along with tutorials for using them, as well as advanced content for further study and a search utility for finding content on the CD and in the printed text. For the convenience of readers who have purchased an ebook edition or who may have misplaced the CD-ROM, all CD content is available as a download at bit.ly/nFXcLq.
This book is recommended for professional digital system designers, programmers, application developers, and system software developers; and undergraduate students in Computer Science, Computer Engineering and Electrical Engineering courses in Computer Organization, Computer Design, ranging from Sophomore required courses to Senior Electives.
- This Revised Fourth Edition of Computer Organization and Design has been updated with new exercises and improvements throughout suggested by instructors teaching from the book
- Covers the revolutionary change from sequential to parallel computing, with a chapter on parallelism and sections in every chapter highlighting parallel hardware and software topics
- Includes an appendix by the Chief Scientist and the Director of Architecture of NVIDIA covering the emergence and importance of the modern GPU, describing in detail for the first time the highly parallel, highly multithreaded multiprocessor optimized for visual computing
Professional digital system designers, programmers, application developers, and system software developers. Undergraduate students in Computer Science, Computer Engineering and Electrical Engineering courses in Computer Organization, Computer Design, ranging from Sophomore required courses to Senior Electives
MIPS Reference Data
In Praise of Computer Organization and Design The HardwareSoftware Interface Revised Fourth Edition
Acknowledgments
Dedication
Preface
1. Computer Abstractions and Technology
1.1 Introduction
1.2 Below Your Program
1.3 Under the Covers
1.4 Performance
1.5 The Power Wall
1.6 The Sea Change: The Switch from Uniprocessors to Multiprocessors
1.7 Real Stuff: Manufacturing and Benchmarking the AMD Opteron X4
1.8 Fallacies and Pitfalls
1.9 Concluding Remarks
Historical Perspective and Further Reading
1.11 Exercises
2. Instructions
2.1 Introduction
2.2 Operations of the Computer Hardware
2.3 Operands of the Computer Hardware
2.4 Signed and Unsigned Numbers
2.5 Representing Instructions in the Computer
2.6 Logical Operations
2.7 Instructions for Making Decisions
2.8 Supporting Procedures in Computer Hardware
2.9 Communicating with People
2.10 MIPS Addressing for 32-bit Immediates and Addresses
2.11 Parallelism and Instructions: Synchronization
2.12 Translating and Starting a Program
2.13 A C Sort Example to Put It All Together
2.14 Arrays versus Pointers
Advanced Material: Compiling C and Interpreting Java
2.16 Real Stuff: ARM Instructions
2.17 Real Stuff: x86 Instructions
2.18 Fallacies and Pitfalls
2.19 Concluding Remarks
Historical Perspective and Further Reading Historical Perspective and Further Reading
2.21 Exercises
3. Arithmetic for Computers
3.1 Introduction
3.2 Addition and Subtraction
3.3 Multiplication
3.4 Division
3.5 Floating Point
3.6 Parallelism and Computer Arithmetic: Associativity
3.7 Real Stuff: Floating Point in the x86
3.8 Fallacies and Pitfalls
3.9 Concluding Remarks
Historical Perspective and Further Reading
3.11 Exercises
4. The Processor
4.1 Introduction
4.2 Logic Design Conventions
4.3 Building a Datapath
4.4 A Simple Implementation Scheme
4.5 An Overview of Pipelining
4.6 Pipelined Datapath and Control
4.7 Data Hazards: Forwarding versus Stalling
4.8 Control Hazards
4.9 Exceptions
4.10 Parallelism and Advanced Instruction-Level Parallelism
4.11 Real Stuff: the AMD Opteron X4 (Barcelona) Pipeline
Advanced Topic: an Introduction to Digital Design Using a Hardware Design Language to Describe and Model a Pipeline and More Pipelining Illustrations
4.13 Fallacies and Pitfalls
4.14 Concluding Remarks
Historical Perspective and Further Reading
4.16 Exercises
5. Large and Fast
5.1 Introduction
5.2 The Basics of Caches
5.3 Measuring and Improving Cache Performance
5.4 Virtual Memory
5.5 A Common Framework for Memory Hierarchies
5.6 Virtual Machines
5.7 Using a Finite-State Machine to Control a Simple Cache
5.8 Parallelism and Memory Hierarchies: Cache Coherence
Advanced Material: Implementing Cache Controllers
5.10 Real Stuff: the AMD Opteron X4 (Barcelona) and Intel Nehalem Memory Hierarchies
5.11 Fallacies and Pitfalls
5.12 Concluding Remarks
Historical Perspective and Further Reading
5.14 Exercises
6. Storage and Other I/O Topics
6.1 Introduction
6.2 Dependability, Reliability, and Availability
6.3 Disk Storage
6.4 Flash Storage
6.5 Connecting Processors, Memory, and I/O Devices
6.6 Interfacing I/O Devices to the Processor, Memory, and Operating System
6.7 I/O Performance Measures: Examples from Disk and File Systems
6.8 Designing an I/O System
6.9 Parallelism and I/O: Redundant Arrays of Inexpensive Disks
6.10 Real Stuff: Sun Fire x4150 Server
Advanced Topics: Networks
6.12 Fallacies and Pitfalls
6.13 Concluding Remarks
Historical Perspective and Further Reading
6.15 Exercises
7. Multicores, Multiprocessors, and Clusters
7.1 Introduction
7.2 The Difficulty of Creating Parallel Processing Programs
7.3 Shared Memory Multiprocessors
7.4 Clusters and Other Message-Passing Multiprocessors
7.5 Hardware Multithreading
7.6 SISD, MIMD, SIMD, SPMD, and Vector
7.7 Introduction to Graphics Processing Units
7.8 Introduction to Multiprocessor Network Topologies
7.9 Multiprocessor Benchmarks
7.10 Roofline: A Simple Performance Model
7.11 Real Stuff: Benchmaking Four Multicores Using the Roofline Model
7.12 Fallacies and Pitfalls
7.13 Concluding Remarks
7.14 Historical Perspective and Further Reading
7.15 Exercises
APPENDIX A. Graphics and Computing GPUs
A.1 Introduction
A.2 GPU System Architectures
A.3 Programming GPUs
A.4 Multithreaded Multiprocessor Architecture
A.5 Parallel Memory System
A.6 Floating-point Arithmetic
A.7 Real Stuff: The NVIDIA GeForce 8800
A.8 Real Stuff: Mapping Applications to GPUs
A.9 Fallacies and Pitfalls
A.10 Concluding Remarks
A.11 Historical Perspective and Further Reading
APPENDIX B. Assemblers, Linkers, and the SPIM Simulator
B.1 Introduction
B.2 Assemblers
B.3 Linkers
B.4 Loading
B.5 Memory Usage
B.6 Procedure Call Convention
B.7 Exceptions and Interrupts
B.8 Input and Output
B.9 SPIM
B.10 MIPS R2000 Assembly Language
B.11 Concluding Remarks
B.12 Exercises
Further Reading
Index
- No. of pages: 916
- Language: English
- Edition: 4
- Published: October 13, 2011
- Imprint: Morgan Kaufmann
- Paperback ISBN: 9780123747501
- eBook ISBN: 9780080886138
DP
David A. Patterson
ACM named David A. Patterson a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. David A. Patterson is the Pardee Chair of Computer Science, Emeritus at the University of California Berkeley. His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Patterson received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions to RISC, and he shared the IEEE Johnson Information Storage Award for contributions to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize with John Hennessy. Like his co-author, Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the CS division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM. This record led to Distinguished Service Awards from ACM, CRA, and SIGARCH.
Affiliations and expertise
Pardee Professor of Computer Science, Emeritus, University of California, Berkeley, USAJH
John L. Hennessy
ACM named John L. Hennessy a recipient of the 2017 ACM A.M. Turing Award for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry. John L. Hennessy is a Professor of Electrical Engineering and Computer Science at Stanford University, where he has been a member of the faculty since 1977 and was, from 2000 to 2016, its tenth President. Prof. Hennessy is a Fellow of the IEEE and ACM; a member of the National Academy of Engineering, the National Academy of Science, and the American Philosophical Society; and a Fellow of the American Academy of Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and the 2000 John von Neumann Award, which he shared with David Patterson. He has also received seven honorary doctorates.
Affiliations and expertise
Departments of Electrical Engineering and Computer Science, Stanford University, USA